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1 время успокоения интегральной микросхемы
время успокоения интегральной микросхемы
время успокоения
Интервал времени с момента достижения выходным напряжением интегральной микросхемы уровня 0,9 до момента последнего пересечения выходным напряжением заданного уровня.
Обозначение
tусп
trip
[ ГОСТ 19480-89]Тематики
Синонимы
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Русско-английский словарь нормативно-технической терминологии > время успокоения интегральной микросхемы
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2 логическая схема
1. logic circuitэквивалентная схема; эквивалентная цепь — equivalent circuit
триггер; триггерная схема; спусковая схема — trigger circuit
2. logic design3. logic diagramпринципиальная схема — schematic; line diagram; flow diagram
4. logical circuit5. logical diagramалгоритмическая схема; схема алгоритма — algorithmic diagram
синтез логических схем; логический синтез — logic synthesis
6. logical structure7. logicразрядные логические схемы; разрядная логика — digit logic
8. logic chartтаблица соединений; схема соединений — communication chart
9. logical circuitryсхема обратной связи; цепь обратной связи — feedback circuit
10. logical design11. logical organizationРусско-английский большой базовый словарь > логическая схема
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